Opened 9 years ago

Last modified 9 years ago

#48975 new submission

NEW: pyverilog-0.9.6

Reported by: yasu@… Owned by: macports-tickets@…
Priority: Normal Milestone:
Component: ports Version: 2.3.3
Keywords: Cc: petrrr
Port: py-pyverilog

Description

New port of Pyverilog, a framework to handle Verilog HDL in Python.

Attachments (1)

Portfile​ (1.5 KB) - added by yasu@… 9 years ago.

Download all attachments as: .zip

Change History (2)

Changed 9 years ago by yasu@…

Attachment: Portfile​ added

comment:1 Changed 9 years ago by petrrr

Cc: petr@… added

Cc Me!

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