Opened 14 years ago

Closed 13 years ago

Last modified 11 years ago

#10977 closed submission (fixed)

NEW: GPL Cver 2.11a Verilog Simulator

Reported by: oksmith77 Owned by: yeled@…
Priority: High Milestone:
Component: ports Version:
Keywords: Verilog Cc: markd@…
Port:

Description

Attached is an archive that contains a Portfile and patches for GPL Cver Verilog Simulator.

Attachments (1)

gplcver.tar.gz (1.9 KB) - added by oksmith77 14 years ago.
Archive with Portfile for GPL Cver

Download all attachments as: .zip

Change History (6)

Changed 14 years ago by oksmith77

Attachment: gplcver.tar.gz added

Archive with Portfile for GPL Cver

comment:1 Changed 13 years ago by kballard (Lily Ballard)

Milestone: New Ports

comment:2 Changed 13 years ago by markd@…

Cc: markd@… added
Resolution: fixed
Status: newclosed

Committed. Thanks!

comment:3 Changed 13 years ago by jmpp@…

Milestone: New PortsPort Submissions

Milestone New Ports deleted

comment:4 Changed 11 years ago by jmroot (Joshua Root)

Type: enhancementsubmission

comment:5 Changed 11 years ago by (none)

Milestone: Port Submissions

Milestone Port Submissions deleted

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