id,summary,reporter,owner,description,type,status,priority,milestone,component,version,resolution,keywords,cc,port 10977,NEW: GPL Cver 2.11a Verilog Simulator,oksmith77,yeled@…,Attached is an archive that contains a Portfile and patches for GPL Cver Verilog Simulator.,submission,closed,High,,ports,,fixed,Verilog,markd@…,