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Ticket #10977 (closed submission: fixed)

Opened 7 years ago

Last modified 4 years ago

NEW: GPL Cver 2.11a Verilog Simulator

Reported by: oksmith@… Owned by: yeled@…
Priority: High Milestone:
Component: ports Version:
Keywords: Verilog Cc: markd@…
Port:

Description

Attached is an archive that contains a Portfile and patches for GPL Cver Verilog Simulator.

Attachments

gplcver.tar.gz​ (1.9 KB) - added by oksmith@… 7 years ago.
Archive with Portfile for GPL Cver

Change History

Changed 7 years ago by oksmith@…

Archive with Portfile for GPL Cver

comment:1 Changed 6 years ago by eridius@…

  • Milestone set to New Ports

comment:2 Changed 6 years ago by markd@…

  • Status changed from new to closed
  • Cc markd@… added
  • Resolution set to fixed

Committed. Thanks!

comment:3 Changed 6 years ago by jmpp@…

  • Milestone changed from New Ports to Port Submissions

Milestone New Ports deleted

comment:4 Changed 4 years ago by jmr@…

  • Type changed from enhancement to submission

comment:5 Changed 4 years ago by anonymous

  • Milestone Port Submissions deleted

Milestone Port Submissions deleted

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